International Conferences Vis-FAB: Visual Analytics Framework for Wafer Failure Analysis in Multistage Fabrication Process
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조회 414회 작성일 25-12-30 15:35
조회 414회 작성일 25-12-30 15:35
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| Conference | IEEE VIS 2025 Conference Austria |
|---|---|
| Name | Sugyeong Lee, Dong-Hee Lee |
| Year | 2025 |
[Abstract]
Investigating root causes of wafer failures is essential in semiconductor fabrication. We introduce Vis-FAB, an end-to-end interactive visual analytics tool for root cause analysis in semiconductor fabrication. Guided by six domain tasks identified via field interviews, Vis-FAB integrates multiclass wafer bin map (WBM) classification, deviation-weighted statistical process control (SPC) for machine causality, what-if simulations, and lot-level commonality analysis to answer engineers’ what, why, and what-if questions. A pilot deployment with engineers from three distinct functional areas shows that Vis-FAB helps quick decision-making and improves traceability across lots.