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Wafer yield prediction plays a significant role in detecting early defects and optimizing manufacturing efficiency. For this reason, methods for forecasting the yield have been actively studied for decades. Traditional statistical models, such as the Poisson model and the Seeds model, have been used to forecast yield, and as semiconductor manufacturing processes become more advanced, the trend has shifted toward data-driven approaches. However, most studies focus on analyzing the variation in yield from defect or metrology data, overlooking the process path information. The path information includes the list of machines that wafers have been through during the process, which has a critical impact on yield decline. To address this, we propose a novel yield prediction model regarding process paths and their corresponding queue times. We utilized three types of machine learning algorithms: regression, tree-based, and neural network. The final prediction accuracy reached its best after performing the stacking ensemble with an MSE of 0.1622 and R² of 0.8434, which are considered reasonable.